pub struct PReg { /* private fields */ }
Expand description
A physical register. Contains a physical register number and a class.
The hw_enc
field contains the physical register number and is in
a logically separate index space per class; in other words, Int
register 0 is different than Float register 0.
Because of bit-packed encodings throughout the implementation,
hw_enc
must fit in 6 bits, i.e., at most 64 registers per class.
The value returned by index()
, in contrast, is in a single index
space shared by all classes, in order to enable uniform reasoning
about physical registers. This is done by putting the class bit at
the MSB, or equivalently, declaring that indices 0..=63 are the 64
integer registers and indices 64..=127 are the 64 float registers.
Implementations§
source§impl PReg
impl PReg
pub const MAX_BITS: usize = 6usize
pub const MAX: usize = 63usize
pub const NUM_INDEX: usize = 128usize
sourcepub const fn new(hw_enc: usize, class: RegClass) -> Self
pub const fn new(hw_enc: usize, class: RegClass) -> Self
Create a new PReg. The hw_enc
range is 6 bits.
sourcepub fn hw_enc(self) -> usize
pub fn hw_enc(self) -> usize
The physical register number, as encoded by the ISA for the particular register class.
sourcepub const fn index(self) -> usize
pub const fn index(self) -> usize
Get an index into the (not necessarily contiguous) index space of all physical registers. Allows one to maintain an array of data for all PRegs and index it efficiently.
sourcepub const fn from_index(index: usize) -> Self
pub const fn from_index(index: usize) -> Self
Construct a PReg from the value returned from .index()
.
Trait Implementations§
source§impl Ord for PReg
impl Ord for PReg
source§impl PartialEq<PReg> for PReg
impl PartialEq<PReg> for PReg
source§impl PartialOrd<PReg> for PReg
impl PartialOrd<PReg> for PReg
1.0.0 · source§fn le(&self, other: &Rhs) -> bool
fn le(&self, other: &Rhs) -> bool
self
and other
) and is used by the <=
operator. Read more