Module cranelift_codegen::ir::types

Common types for the Cranelift code generator.

Structs

• Type
  The type of an SSA value.

Constants

• B1
  A boolean type with 1 bits.
• B8
  A boolean type with 8 bits.
• B8X8
  A SIMD vector with 8 lanes containing a b8 each.
• B8X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing b8 bits each.
• B8X16
  A SIMD vector with 16 lanes containing a b8 each.
• B8X16XN
  A dynamically-scaled SIMD vector with a minimum of 16 lanes containing b8 bits each.
• B8X32
  A SIMD vector with 32 lanes containing a b8 each.
• B8X32XN
  A dynamically-scaled SIMD vector with a minimum of 32 lanes containing b8 bits each.
• B8X64
  A SIMD vector with 64 lanes containing a b8 each.
• B8X64XN
  A dynamically-scaled SIMD vector with a minimum of 64 lanes containing b8 bits each.
• B16
  A boolean type with 16 bits.
• B16X4
  A SIMD vector with 4 lanes containing a b16 each.
• B16X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing b16 bits each.
• B16X8
  A SIMD vector with 8 lanes containing a b16 each.
• B16X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing b16 bits each.
• B16X16
  A SIMD vector with 16 lanes containing a b16 each.
• B16X16XN
  A dynamically-scaled SIMD vector with a minimum of 16 lanes containing b16 bits each.
• B16X32
  A SIMD vector with 32 lanes containing a b16 each.
• B16X32XN
  A dynamically-scaled SIMD vector with a minimum of 32 lanes containing b16 bits each.
• B32
  A boolean type with 32 bits.
• B32X2
  A SIMD vector with 2 lanes containing a b32 each.
• B32X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing b32 bits each.
• B32X4
  A SIMD vector with 4 lanes containing a b32 each.
• B32X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing b32 bits each.
• B32X8
  A SIMD vector with 8 lanes containing a b32 each.
• B32X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing b32 bits each.
• B32X16
  A SIMD vector with 16 lanes containing a b32 each.
• B32X16XN
  A dynamically-scaled SIMD vector with a minimum of 16 lanes containing b32 bits each.
• B64
  A boolean type with 64 bits.
• B64X2
  A SIMD vector with 2 lanes containing a b64 each.
• B64X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing b64 bits each.
• B64X4
  A SIMD vector with 4 lanes containing a b64 each.
• B64X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing b64 bits each.
• B64X8
  A SIMD vector with 8 lanes containing a b64 each.
• B64X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing b64 bits each.
• B128
  A boolean type with 128 bits.
• B128X2
  A SIMD vector with 2 lanes containing a b128 each.
• B128X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing b128 bits each.
• B128X4
  A SIMD vector with 4 lanes containing a b128 each.
• B128X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing b128 bits each.
• F32
  A 32-bit floating point type represented in the IEEE 754-2008 binary32 interchange format. This corresponds to the :c:type:float type in most C implementations.
• F32X2
  A SIMD vector with 2 lanes containing a f32 each.
• F32X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing f32 bits each.
• F32X4
  A SIMD vector with 4 lanes containing a f32 each.
• F32X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing f32 bits each.
• F32X8
  A SIMD vector with 8 lanes containing a f32 each.
• F32X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing f32 bits each.
• F32X16
  A SIMD vector with 16 lanes containing a f32 each.
• F32X16XN
  A dynamically-scaled SIMD vector with a minimum of 16 lanes containing f32 bits each.
• F64
  A 64-bit floating point type represented in the IEEE 754-2008 binary64 interchange format. This corresponds to the :c:type:double type in most C implementations.
• F64X2
  A SIMD vector with 2 lanes containing a f64 each.
• F64X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing f64 bits each.
• F64X4
  A SIMD vector with 4 lanes containing a f64 each.
• F64X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing f64 bits each.
• F64X8
  A SIMD vector with 8 lanes containing a f64 each.
• F64X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing f64 bits each.
• FFLAGS
  CPU flags representing the result of a floating point comparison. These flags can be tested with a :type:floatcc condition code.
• I8
  An integer type with 8 bits. WARNING: arithmetic on 8bit integers is incomplete
• I8X8
  A SIMD vector with 8 lanes containing a i8 each.
• I8X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing i8 bits each.
• I8X16
  A SIMD vector with 16 lanes containing a i8 each.
• I8X16XN
  A dynamically-scaled SIMD vector with a minimum of 16 lanes containing i8 bits each.
• I8X32
  A SIMD vector with 32 lanes containing a i8 each.
• I8X32XN
  A dynamically-scaled SIMD vector with a minimum of 32 lanes containing i8 bits each.
• I8X64
  A SIMD vector with 64 lanes containing a i8 each.
• I8X64XN
  A dynamically-scaled SIMD vector with a minimum of 64 lanes containing i8 bits each.
• I16
  An integer type with 16 bits. WARNING: arithmetic on 16bit integers is incomplete
• I16X4
  A SIMD vector with 4 lanes containing a i16 each.
• I16X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing i16 bits each.
• I16X8
  A SIMD vector with 8 lanes containing a i16 each.
• I16X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing i16 bits each.
• I16X16
  A SIMD vector with 16 lanes containing a i16 each.
• I16X16XN
  A dynamically-scaled SIMD vector with a minimum of 16 lanes containing i16 bits each.
• I16X32
  A SIMD vector with 32 lanes containing a i16 each.
• I16X32XN
  A dynamically-scaled SIMD vector with a minimum of 32 lanes containing i16 bits each.
• I32
  An integer type with 32 bits.
• I32X2
  A SIMD vector with 2 lanes containing a i32 each.
• I32X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing i32 bits each.
• I32X4
  A SIMD vector with 4 lanes containing a i32 each.
• I32X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing i32 bits each.
• I32X8
  A SIMD vector with 8 lanes containing a i32 each.
• I32X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing i32 bits each.
• I32X16
  A SIMD vector with 16 lanes containing a i32 each.
• I32X16XN
  A dynamically-scaled SIMD vector with a minimum of 16 lanes containing i32 bits each.
• I64
  An integer type with 64 bits.
• I64X2
  A SIMD vector with 2 lanes containing a i64 each.
• I64X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing i64 bits each.
• I64X4
  A SIMD vector with 4 lanes containing a i64 each.
• I64X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing i64 bits each.
• I64X8
  A SIMD vector with 8 lanes containing a i64 each.
• I64X8XN
  A dynamically-scaled SIMD vector with a minimum of 8 lanes containing i64 bits each.
• I128
  An integer type with 128 bits.
• I128X2
  A SIMD vector with 2 lanes containing a i128 each.
• I128X2XN
  A dynamically-scaled SIMD vector with a minimum of 2 lanes containing i128 bits each.
• I128X4
  A SIMD vector with 4 lanes containing a i128 each.
• I128X4XN
  A dynamically-scaled SIMD vector with a minimum of 4 lanes containing i128 bits each.
• IFLAGS
  CPU flags representing the result of an integer comparison. These flags can be tested with an :type:intcc condition code.
• INVALID
  Not a valid type. Can’t be loaded or stored. Can’t be part of a SIMD vector.
• R32
  An opaque reference type with 32 bits.
• R64
  An opaque reference type with 64 bits.